Electronic components have become smaller and thinner as the desire for small, thin, and lightweight devices continues to increase. This has lead to many developments in the manufacture, design and packaging of electronic components and integrated circuits. For example, printed circuit boards (PCB) are widely used for packaging of integrated circuits and devices. Current PCB substrates must provide a variety of functions such as efficient signal transmission and power distribution to and from the integrated circuits, as well as provide effective dissipation of heat generated by the integrated circuits during operation. The substrates must exhibit sufficient strength to protect the integrated circuits from external forces such as mechanical and environmental stresses. As device densities increase, high density package designs such as multi-layer structures are becoming increasingly important, which present additional design challenges.
Polymers have emerged as a desirable material for PCB substrates. Polymer substrates exhibit advantages such as flexibility, low cost, light weight and high heat resistance, among other properties. For example, various polymer and carbon materials have been used such as epoxy, phenol and polyimide resins, and the like. Low end organic materials, such as glass reinforced epoxy, have been employed as PCB substrates. However, such materials exhibit poor thermal conductivity and anisotropic thermal expansion. Improved organic materials such as glass reinforced polyimide, cyanate, ester and Teflon show improved temperate stability, but suffer from moisture absorption and poor adhesive strength to copper.
Non-organic PCB substrates are also used. Alumina (ceramic) is widely used and exhibits desirable thermal conductivity and coefficient of thermal expansion (CTE), however such substrates are brittle and costly. Thus it is expected that new materials will continue to be explored as potential candidates for PCB substrates. Irrespective of the PCB substrate used in a particular application, electroplating or electro-chemical deposition techniques, particularly electroless plating, have been widely adopted to form metallization layers on the PCB substrates. Copper has become a desired metal for metallization of printed circuit boards (PCB), flexible circuit boards (FCB), multi-chip modules (MCM), and the like, as well as for semiconductor device fabrication, because of its lower resistivity and significantly higher electromigration resistance as compared to aluminum and good thermal conductivity. Copper electro-chemical plating systems have also been developed for semiconductor fabrication of advanced interconnect structures. These methods have involved the following two basic steps: (1) treating the surface of the non-conductive substrate with an agent to make it catalytically receptive to electrolessly formed metal deposits; and (2) electrodepositing a metal over the electrolessly formed conductive metal deposits. The pattern of the printed circuit is achieved through the use of screen printing or photoresist imaging. The non-conductive substrate may initially be copper-clad or not; but most boards have copper cladding at the beginning of the process, which is later removed in the non-pattern areas. Such processes are, consequently, referred to as subtractive.
In the typical processes relevant to printed circuit board manufacture wherein through-hole metallization is employed, the catalytic material most often comprises palladium metal. The process of applying the catalytic material to the substrate surfaces typically involves contact of the substrate with a colloidal solution of palladium and tin compounds. See, e.g., U.S. Pat. Nos. 3,011,920 and 3,532,518. It is generally considered that the tin compounds act as protective colloids for the catalytic palladium. In most cases, the catalysis of the non-conductive substrate of the printed circuit board is followed by an “acceleration” step which exposes or increases exposure of the active catalytic species.
Following deposition of catalyst material on the non-conductive surfaces in the manner described, the surfaces are then contacted with an electroless metal depositing solution in which plating chemical reduction leads to the deposit of metal from the bath onto the catalyzed surface. The through-holes are usually plated with a copper reduction procedure known to the art as electroless copper plating, such as that described by Clyde F. Coombs, Jr. in Printed Circuit Handbook 3rd Edition, McGraw-Hill Book Co., New York, N.Y., 1988, Chapter 12.5, which is incorporated herein by reference in its entirety.
Methods of the type described above, while apparently simple, have proven to be expensive and demanding of strict process controls. Further limitations on the use of these processes result from the chemical susceptibility of the electroless metal layer and by the required use of very hazardous and toxic chemical agents. Efforts to overcome these disadvantages have met with only partial success in the past and have brought with them their own disadvantages. Accordingly, in order to appreciate the significance of the improvements achieved by the present invention it will be helpful to review beforehand the main features of current printed circuit board technology.
In a typical process for the manufacture of a single- or double-sided printed circuit board, suitable substrates typically comprise laminates consisting of two or more foils of copper, which are separated from each other by a layer of non-conductive material. The non-conductive layer or layers are preferably an organic material such as epoxy resin impregnated with glass fibers. Holes are drilled or punched at appropriate locations on the board, providing side-to-side connections when metallized. Thereafter, the board is treated with a cleaning composition, typically alkaline, which removes soils and conditions the through-holes, followed by a slow acid etching process which is used for removal of copper surface pretreatments, oxidation and presentation of uniformly active copper. Typical compositions for this micro-etching step are persulfates and sulfuric acid-hydrogen peroxide solutions. The board is next catalyzed with a neutral or acid solution of tin/palladium catalyst, which deposits a thin layer of surface-active palladium in the through-holes and on the surface of the board. Colloidal tin on the board surfaces and through-holes is removed by treatment with an accelerator composition. The board is then ready for electroless copper plating, which is typically carried out with an alkaline chelated copper reducing solution that deposits a thin copper layer in the through holes and on the surfaces of the board. After acid-dipping, commonly with sulfuric acid, the board is metal plated with a conventional copper plating solution. It is more usual, however, to precede this metallization step with an imaging step.
In a process known as pattern plating, a dry film photoresist is laminated to the board and then exposed to transfer the negative image of the circuit, after which it is developed to remove the unexposed portions. The resist coats the copper that is not part of the conductor pattern. Thickness of the exposed copper pattern is increased by electrolytic copper plating. The imaged dry film resist is then removed, exposing unwanted copper i.e. copper which is not part of the conductor pattern, and said unwanted copper is dissolved with a suitable etchant, e.g., ammoniacal copper or sulfuric acid/peroxide.
A multilayered printed circuit board is made by a similar process, except that pre-formed circuit boards are stacked on top of each other and coated with a dielectric layer. The stack is pressed and bonded together under heat and pressure, after which holes are drilled and plated in the above-described manner. However, one problem present with the manufacture of multilayer printed circuit board through-holes is that the drilling of the holes causes resin “smear” on the exposed conductive copper metal inner layers, due to heating during the drilling operation. The resin smear may act as an insulator between the later plated-on metal in the through holes and these copper inner layers. Thus, this smear may result in poor electrical connections and must be removed before the plating-on operation.
Various alkaline permanganate treatments have been used as standard methods for desmearing surfaces of printed circuit boards, including the through-holes. Such permanganate treatments have been employed for reliably removing wear and drilling debris, as well as for texturing or micro roughening the exposed epoxy resin surfaces. The latter effect significantly improves through-hole metallization by facilitating adhesion to epoxy resin, at the price of roughening the copper and decreasing the frequency response of the copper traces. Other conventional smear removal methods have included treatment with sulfuric acid, chromic acid, and plasma desmear, which is a dry chemical method in which boards are exposed to oxygen and fluorocarbon gases, e.g., CF4. Generally, permanganate treatments involve three different solution treatments used sequentially. They are (1) a solvent swell solution, (2) a permanganate desmear solution, and (3) a neutralization solution. Typically, a printed circuit board is dipped or otherwise exposed to each solution with a deionized water rinse between each of the three treatment solutions.
Electroplating surfaces with copper coatings is generally well known in the industry. Typically, copper electroplating processes use a plating bath/electrolyte including positively charged copper ions in contact with a negatively charged substrate, as a source of electrons, to plate out the copper on the charged substrate. In general, electroplating methods involve passing a current between two electrodes in a plating solution where one electrode is the article to be plated. A common plating solution would be an acid copper plating solution containing (1) a dissolved copper salt (such as copper sulfate), (2) an acidic electrolyte (such as sulfuric acid) in an amount sufficient to impart conductivity to the bath and (3) additives (such as surfactants, brighteners, levelers and suppressants) to enhance the effectiveness and quality of plating. Descriptions of copper plating baths may be found generally in U.S. Pat. Nos. 5,068,013; 5,174,886; 5,051,154; 3,876,513; and 5,068,013.
All electrochemical plating electrolytes have both inorganic and organic compounds at low concentrations. Typical inorganics include copper sulfate (CuSO4), sulfuric acid (H2SO4), and trace amounts of chloride (Cl−) ions. Typical organics include accelerators, suppressors, and levelers. An accelerator is sometimes called a brightener or anti-suppressor. A suppressor may be a surfactant or wetting agent, and is sometimes called a carrier. A leveler is also called a grain refiner or an over-plate inhibitor.
As described above, most electrochemical plating processes generally require two steps, wherein a seed layer is first formed over the surface of features on the substrate (i.e. the electrodes step, this process may be performed in a separate system), and then the surfaces of the features are exposed to an electrolyte solution while an electrical bias is simultaneously applied between the substrate surface (serving as a cathode) and an anode positioned within the electrolyte solution (i.e. the electroplating or electrodeposition step).
The use of copper however suffers from a number of limitations. For printed circuit board applications, adhesion of copper to polymer PCB substrates is generally weak, thus requiring treatment of the surface of the substrate by a variety of means. For example, surface adhesion may be enhanced by treatments such as oxidation, wet chemical treatment, plasma or UV exposure to roughen the surface of the substrate. As mentioned above, however, one problem present with the manufacture of multilayer printed circuit board through-holes is that the drilling of the holes causes resin “smear” on the exposed conductive copper metal inner layers, due to heating during the drilling operation. The resin smear may act as an insulator between the later plated-on metal in the through holes and these copper inner layers. Thus, this smear may result in poor electrical connections and must be removed before the plating-on operation. Prior art techniques such as different permanganate desmearing and or neutralization compositions and methods have been tried to address this problem. For example, U.S. Pat. No. 4,073,740 to Polichette et al. discloses a composition comprising water, permanganate ion and manganate ion, with a manganate/permanganate molar ratio of up to 1.2 to 1 and a pH of from 11 to 13. U.S. Pat. No. 4,515,829 to Deckart et al discloses contacting through-hole walls with an aqueous alkaline permanganate solution and thereafter a reducing agent solution. U.S. Pat. No. 4,592,852 to Courduvelis et al. teaches the use of an alkaline composition to improve the adhesion of plastics to electroless metal deposits. U.S. Pat. No. 5,015,339 to Pendelton et al. discloses contacting a substrate with an alkaline permanganate solution, and thereafter with a single-step permanganate neutralizer and conditioner composition.
Other teachings in the art have suggested different approaches. For example, U.S. Pat. No. 4,803,097 to Fraenkel et al. discloses first exposing the surfaces of a nonconductive substrate to an atmosphere of ozone, followed by a conditioning solvent of alcohols and strong bases, and then treatment with an oxidizing agent e.g., permanganate. U.S. Pat. No. 4,152,477 to Haruta et al. suggests etching a butadiene composition to expose phenolic resin microcapsules in it, then sensitizing it with palladium chloride. U.S. Pat. No. 4,448,804 to Amelio et al describes treatment with an acidic solution containing a multifunctional ionic copolymer which has good adhesion to the substrate surface. U.S. Pat. No. 5,268,088 to Okabayashi discloses the use of alkaline adhesion promoter solutions comprising aqueous alkali metal salts, e.g., KOH and NaOH. Glass fibers used to impregnate epoxy resin have a highly negative surface charge and repel negatively charged tin-palladium catalyst particles. U.S. Pat. No. 4,976,990 to Bach et al. discloses conditioning agents which improve adsorption of the activating material on the glass fiber, e.g., an organic silicon compound. U.S. Pat. No. 5,342,654 to Koizume et al. discloses a method for surface roughening boards made of polyphenylene sulfide resin by incorporating a specific resin therein and selectively dissolving away the specific resin at the surface.
Electroless plating systems based on palladium and tin chloride catalysts in acidic solutions have become widely used and reported. U.S. Pat. No. 4,478,883 to Bupp et al. describes that a palladium seeding agent may be attracted to the surface of a conductive metals such as copper, resulting in smaller amounts of the palladium catalyst going to desired areas, e.g., when plating through-holes where copper may be present in internal planes of the substrate. U.S. Pat. No. 4,554,182 to Bupp et al. further describes replacing HCl with H2SO4, apparently eliminating a problem of resist blistering and line tailing. Efforts have been made to replace such highly acidic systems. U.S. Pat. No. 4,634,468 to Gulla et al. discloses a reduced catalytic metal fixed onto an organic suspending agent which serves as a protective colloid, and is preferably a water soluble polymer, e.g., polyacrylamide or polyvinyl pyrrolidone.
Since acidic solutions sometimes cause problems to develop in the copper layer of laminated circuit boards, modifications of the catalytic system have been developed, e.g., a single step method using a variety of different pH colloidal suspensions of both the tin sensitizer and the palladium activator, as disclosed in U.S. Pat. No. 3,011,920 to Shipley, Jr. and U.S. Pat. No. 3,532,518 to D'Ottavio. Another variation of the process is disclosed in U.S. Pat. No. 5,318,803 to Bickford et al., where the catalyzing step is carried out twice, based on redox exchange reactions.
The electroless metal coating, usually copper, functions to make the through-holes conductive for either further electroplating, or for full electroless deposition to the full thickness desired, and to the full surface circuit pattern desired. Where the substrate is non-copper clad initially, the function of the electroless copper is to make the surface conductive as well as the through-holes. The electroless plating step has received abundant treatment in the art. U.S. Pat. No. 4,904,506 to Burnett et al. discloses electroless copper plating in which two successive layers of copper are plated onto the substrate from an alkaline electroless bath, the second bath having higher cyanide ion and O2 concentrations than the first. Current trends in printed circuit board technology indicate that smaller, higher-aspect-ratio holes will become the state of the art. Recently, there has been a substantial decline in the average size of the through-hole in manufactured boards, from 0.030″ and larger, to smaller diameters. Such trends place increasing pressure on methodologies for producing printed circuit boards with regard to the always difficult task of properly plating the through-holes.
Direct plating is disclosed in U.S. Pat. No. 4,810,333 to Gulla et al., where the non-conductive substrate is treated with an absorbed colloid surface coating before direct electroplating is carried out. The requirement for relatively high current densities limits this process to plating larger through-holes. Another limitation of past methods has been their lack of adaptability to plating circuit board construction techniques now in use, which are often referred to as photoresist methods. U.S. Pat. No. 4,089,686 to Townsend discloses such a method using a photopolymerizable composition. U.S. Pat. No. 4,948,707 to Johnson et al. discloses a permanent resist material employed over the catalyst layer in a predetermined pattern. However, the layer of catalyzing material beneath the resist layer tends to cause current leakage between circuit lines in close proximity to each other, e.g., in high density circuits. It is taught to insulate the catalyst particles by employing a homogeneous colloidal dispersion of palladium/tin particles, which must then be activated by application of a conventional accelerating solution.
The use of a post-activation or acceleration step prior to the final step of electro-deposition has become widespread. The purpose of this step is to render the activating species deposited in the activation step as “active” as possible prior to immersing the board into the electroless copper bath. Typically, the activating species is palladium, and in order to prevent the palladium from readily oxidizing to a nonactivating form it is combined with from 1 to 10 times as many tin atoms in the stannous state. The post-activation composition, e.g., a strongly acidic or strongly basic solution, removes some of the tin atoms surrounding the palladium, thereby making greater access to the catalyzing palladium by the electroless copper plating solution. Some of the tin and palladium atoms are removed and become dispersed in the post-activation solution, where they combine to form a new and more active species which quickly initiates electroless deposition. The post-activation treatment also serves the function of solubilizing the hydroxides of tin which are formed during the rinse steps which follow activation. The hydroxides of tin form a gelatinous coating on the palladium metal activator particles, which interfere with their proper functioning.
The post-activation or accelerator solutions require close monitoring of their concentrations, treatment times and temperatures, agitation, and accumulating levels of tin and copper, in order to avoid excess removal of tin and palladium. U.S. Pat. No. 5,342,501 to Okabavashi teaches that an accelerator solution can also be a mildly basic or alkaline bath incorporating a small quantity of copper ions. U.S. Pat. No. 4,608,275 to Kukanskis et al discloses agents which oxidize the protective stannous tin and activate the palladium catalyst, e.g., sodium chlorite, hydrogen peroxide, potassium permanganate, and sodium perborate, and suggests use therewith of an electroless nickel bath.
As illustrated by the foregoing, much work has been performed directed to the development and fabrication of printed circuit boards and designs. However, the fabrication steps are often costly and complicated, and improvements are thus highly sought.
Further in all applications, i.e. as a metallization layer in PCB designs and in semiconductor devices, copper tends to plate on local sites of nucleation, resulting in clusters of copper nuclei, copper clusters/crystal, so deposition is not uniform across the substantial or whole surface of the substrate.
Thus, there is a need for additional developments and improvements in the fabrication of PCB's, including for example a metal plating process that can treat the surface of a substrate to promote advantageous binding of metal elements on the surface, and additionally methods to plate a thin copper seed layer directly on printed circuit board substrates capable of uniformly forming metal, such as copper, across the substrate surface and fill features before plating of a bulk metal layer.